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 Ordering number : EN5804A
CMOS IC
LC3564B, BS, BM, BT-70/10
64K (8192-word x 8-bit) SRAM with OE, CE1, and CE2 Control Pins
Overview
The LC3564B, LC3564BS, LC3564BM, and LC3564BT are 8192-word x 8-bit asynchronous silicon gate CMOS SRAMs. These are full CMOS type SRAMs that adopt a six-transistor memory cell and feature fast access times, low operating power dissipation, and an ultralow standby current. These SRAMs provide three control signal inputs: an OE input for high-speed memory access, and two chip enable lines, CE1 and CE2, for low power mode and device selection. These means that these SRAMs area ideal for systems that require low power and battery backup, and that they support easy memory expansion. The ultralow standby current that is a feature of these SRAMs allows them to be used with capacitor backup as well. Since these SRAMs support 3-V operation, they are also appropriate for use in portable battery operated systems.
* * * *
Three control inputs: OE, CE1, and CE2 Shared input and output pins, three-state outputs No clock required Packages 28-pin DIP (600 mil) plastic package: LC3564B 28-pin DIP (300 mil) plastic package: LC3564BS 28-pin SOP (450 mil) plastic package: LC3564BM 28-pin TSOP (8 x 13.4 mm) plastic package: LC3564BT
Package Dimensions
unit: mm 3012A-DIP28 (600 mil)
[LC3564B]
Features
* Supply voltage range: 2.7 to 5.5 V -- In 5-V operation mode: 5.0 V 10% -- In 3-V operation mode: 3.0 V 10% * Address access time (tAA) -- In 5-V operation mode: LC3564B, BS, BM, and BT-70: 70 ns (max) LC3564B, BS, BM, and BT-10: 100 ns (max) -- In 3-V operation mode: LC3564B, BS, BM, and BT-70: 200 ns (max) LC3564B, BS, BM, and BT-10: 500 ns (max) * Ultralow standby current -- In 5-V operation mode: 1.0 A (Ta 70C), 3.0 A (Ta 85C) -- In 3-V operation mode: 0.8 A (Ta 70C), 2.5 A (Ta 85C) * Operating temperature range -- In 5-V operation mode: -40 to 85C -- In 3-V operation mode: -40 to 85C * Data retention supply voltage: 2.0 to 5.5 V * All input and output levels: -- In 5-V operation mode: TTL compatible levels -- In 3-V operation mode: VCC -0.2 V/0.2 V
SANYO: DIP28 (600 mil)
unit: mm 3133-DIP28 (300 mil)
[LC3564BS]
SANYO: DIP28 (300 mil)
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
53098HA (OT) No. 5804-1/9
LC3564B, BS, BM, BT-70/10 unit: mm 3187-SOP28
[LC3564BM]
unit: mm 3221-TSOP28 (type I)
[LC3564BT]
SANYO: SOP28
SANYO: TSOP28 (type I)
Pin Assignments
Block Diagram
Address buffer Row decoder
Memory cell array
Pin Functions
A0 to A12 WE OE CE1, CE2 I/O1 to I/O8 VCC, GND Address inputs Read/write control input Output enable input Chip enable inputs Data I/O Power supply and ground
Input data control circuit
Input data buffer
Column I/O circuit Column decoder
Output data
Address buffer
Function Table
Mode Read cycle Write cycle Output disable Not selected X : H or L CE1 L L L H X CE2 H H H X L OE L X H X X WE H L H X X I/O Data output Data input High impedance High impedance High impedance Supply current ICCA ICCA ICCA ICCS ICCS
No. 5804-2/9
LC3564B, BS, BM, BT-70/10
Specifications
Absolute Maximum Ratings at Ta = 25C
Parameter Maximum supply voltage Input voltage I/O voltage Operating temperature Storage temperature Note: For pulse widths less than 30 ns: -3.0 V Symbol VCC max VIN VI/O Topr Tstg Conditions Ratings 7.0 -0.3* to VCC + 0.3 -0.3 to VCC + 0.3 -40 to +85 -55 to +125 Unit V V V C C
Input and Output Capacitances at Ta = 25C, f = 1 MHz
Parameter I/O pin capacitance Input pin capacitance Symbol CI/O CIN VI/O = 0 V VIN = 0 V Conditions Ratings min typ 6 6 max 10 10 Unit pF pF
Note: These parameters are sampled, and are not measured for every unit.
[5-V Operation] DC Allowable Operating Ranges at Ta = -40 to +85C, VCC = 4.5 to 5.5 V
Parameter Supply voltage Input voltage Note: For pulse widths less than 30 ns: -3.0 V Symbol VCC VIH VIL Conditions Ratings min 4.5 2.2 -0.3* typ 5.0 max 5.5 VCC + 0.3 +0.8 Unit V V V
DC Electrical Characteristics at Ta = -40 to +85C, VCC = 4.5 to 5.5 V
Parameter Input leakage current I/O leakage current Output high-level voltage Output low-level voltage Symbol ILI ILO VOH VOL ICCA1 VCC - 0.2 V/0.2 V inputs ICCA4 Operating supply current ICCA2 TTL inputs ICCA3 VIN = 0 to VCC VCE1 = VIH or VCE2 = VIL or VOE = VIH or VWE = VIL, VI/O = 0 to VCC IOH = -1.0 mA IOL = 2.0 mA VCE1 0.2 V, VCE2 VCC - 0.2 V, II/O = 0 mA, VIN 0.2 V or VIN VCC - 0.2 V Ta 70C Ta 85C 0.01 Conditions Ratings min -1.0 -1.0 2.4 0.4 1.0 3.0 35 30 4 7 40 35 7 Ta 70C Ta 85C 0.01 1.0 3.0 2.0 mA mA A mA mA mA mA typ * max +1.0 +1.0 Unit A A V V A
VCE1 0.2 V, min LC3564B,BS, BM, BT-70 VCE2 VCC - 0.2 V, cycle LC3564B,BS,BM,BT-10 II/O = 0 mA, DUTY = 100% 1 s cycle VCE1 = VIL, VCE2 = VIH, II/O = 0 mA, VIN = VIH or VIL VCE1 = VIL, VCE2 = VIH, II/O = 0 mA, DUTY = 100% VCE2 0.2 V or VCE1 VCC - 0.2 V VCE2 VCC - 0.2 V min LC3564B,BS, BM, BT-70 cycle LC3564B,BS,BM,BT-10 1 s cycle
Standby mode supply current
VCC - 0.2 V/0.2 V inputs TTL inputs
ICCS1 ICC2
VCE2 = VIL or VCE1 = VIH, VIN = 0 to VCC
Note *: Reference values at VCC = 5 V, Ta = 25C
No. 5804-3/9
LC3564B, BS, BM, BT-70/10 AC Electrical Characteristics at Ta = -40 to +85C, VCC = 4.5 to 5.5 V
Parameter [AC Test Conditions] Input pulse voltage Input rise and fall times Input and output timing level Output load VIH = 2.4 V, VIL = 0.6 V 5 ns 1.5 V LC3564B, BS, BM, and BT-70: 30 pF + 1 TTL gate (Including the jig capacitance.) LC3564B, BS, BM, and BT-10: 100 pF + 1 TTL gate (Including the jig capacitance.) Conditions
Read Cycle
LC3564B, BS, BM, BT Parameter Symbol min Read cycle time Address access time CE1 access time CE2 access time OE access time Output hold time CE1 output enable time CE2 output enable time OE output enable time CE1 output disable time CE2 output disable time OE output disable time tRC tAA tCA1 tCA2 tOA tOH tCOE1 tCOE2 tOOE tCOD1 tCOD2 tOOD 10 10 10 5 30 30 25 70 70 70 70 35 10 10 10 5 35 35 25 -70 max min 100 100 100 100 50 -10 max ns ns ns ns ns ns ns ns ns ns ns ns Unit
Write Cycle
LC3564B, BS, BM, BT Parameter Symbol min Write cycle time Address setup time Write pulse width CE1 setup time CE2 setup time Write recovery time CE1 write recovery time CE2 write recovery time Data setup time Data hold time CE1 data hold time CE2 data hold time WE output enable time WE output disable time tWC tAS tWP tCW1 tCW2 tWR tWR1 tWR2 tDS tDH tDH1 tDH2 tWOE tWOD 70 0 50 60 60 0 0 0 35 0 0 0 5 30 -70 max min 100 0 55 65 65 0 0 0 40 0 0 0 5 35 -10 max ns ns ns ns ns ns ns ns ns ns ns ns ns ns Unit
No. 5804-4/9
LC3564B, BS, BM, BT-70/10 [3-V Operation] DC Allowable Operating Ranges at Ta = -40 to +85C, VCC = 2.7 to 3.3 V
Parameter Supply voltage Input voltage Symbol VCC VIH VIL Conditions Ratings min 2.7 VCC - 0.2 0 typ 3.0 max 3.3 VCC 0.2 Unit V V V
DC Electrical Characteristics at Ta = -40 to +85C, VCC = 2.7 to 3.3 V
Parameter Input leakage current I/O leakage current Output high-level voltage Output low-level voltage Symbol ILI ILO VOH VOL ICCA1 Operation supply current VCC - 0.2 V/0.2 V inputs ICCA4 VIN = 0 to VCC VCE1 = VIH or VCE2 = VIL or VOE = VIH or VWE = VIL, VI/O = 0 to VCC IOH = -0.5 mA IOL = 1.0 mA VCE1 VIL, VCE2 VIH, II/O = 0 mA, VIN VIL or VIN VIH VCE1 VIL, VCE2 VIH, II/O = 0 mA, DUTY = 100% VCE2 0.2 V or VCE1 VIH VCE2 VIH min Ta 70C Ta 85C LC3564B,BS, BM, BT-70 0.01 Conditions Ratings min -1.0 -1.0 VCC - 0.2 0.2 0.8 A 2.5 20 10 3 Ta 70C Ta 85C 0.01 0.8 A 2.5 mA mA typ * max +1.0 +1.0 Unit A A V V
cycle LC3564B,BS,BM,BT-10 1 s cycle
Standby mode supply current
VCC - 0.2 V/0.2 V inputs
ICCS1
Note *: Reference values at VCC = 3 V, Ta = 25C
No. 5804-5/9
LC3564B, BS, BM, BT-70/10 AC Electrical Characteristics at Ta = -40 to +85C, VCC = 2.7 to 3.3 V
Parameter [AC Test Conditions] Input pulse voltage Input rise and fall times Input and output timing level Output load VIH = VCC - 0.2 V, VIL = 0.2 V 10 ns 1.5 V LC3564B, BS, BM, BT-70 : 30pF (Including the jig capacitance.) LC3564B, BS, BM, BT-10 : 100pF (Including the jig capacitance.) Conditions
Read Cycle
LC3564B, BS, BM, BT Parameter Symbol min Read cycle time Address access time CE1 access time CE2 access time OE access time Output hold time CE1 output enable time CE2 output enable time OE output enable time CE1 output disable time CE2 output disable time OE output disable time tRC tAA tCA1 tCA2 tOA tOH tCOE1 tCOE2 tOOE tCOD1 tCOD2 tOOD 20 20 20 10 60 60 50 200 200 200 200 100 20 20 20 10 120 120 100 -70 max min 500 500 500 500 250 -10 max ns ns ns ns ns ns ns ns ns ns ns ns Unit
Write Cycle
LC3564B, BS, BM, BT Parameter Symbol min Write cycle time Address setup time Write pulse width CE1 setup time CE2 setup time Write recovery time CE1 write recovery time CE2 write recovery time Data setup time Data hold time CE1 data hold time CE2 data hold time WE output enable time WE output disable time tWC tAS tWP tCW1 tCW2 tWR tWR1 tWR2 tDS tDH tDH1 tDH2 tWOE tWOD 60 200 0 140 150 0 0 0 130 0 0 0 10 -70 max min 500 0 200 250 250 0 0 0 180 0 0 0 10 120 -10 max ns ns ns ns ns ns ns ns ns ns ns ns ns ns Unit
No. 5804-6/9
LC3564B, BS, BM, BT-70/10 Timing Charts Read Cycle *1
Write Cycle (1): WE Write *6
No. 5804-7/9
LC3564B, BS, BM, BT-70/10 Write Cycle (2): CE1 Write *6
Write Cycle (3): CE2 Write *6
Notes: 1. Hold WE high during the read cycle. 2. Applications must not apply reverse phase signals to the DOUT pins when those pins are in the output state. 3. The time tWP is the period when CE1 and WE are low and CE2 is high, and is defined as the time from the fall of WE until either CE1 or WE rises, or CE2 falls, whichever occurs first. 4. The times tCW1 and tCW2 are periods when CE1 and WE are low and CE2 is high. They are defined as the times from the fall of CE1 or the rise of CE2 to the rise of CE1 and WE, or the fall of CE2, whichever occurs first. 5. The DOUT pins will be in the high-impedance state if either OE is high, CE1 is high, CE2 is low, or WE is low. 6. OE must be held either at VIH or VIL during the write cycle. 7. The DOUT pins have the same phase as the write cycle write data.
No. 5804-8/9
LC3564B, BS, BM, BT-70/10 Data Retention Characteristics at Ta = -40 to +85C
Parameter Symbol VDR Conditions VCE2 0.2 V or VCE1 VCC - 0.2 V, VCE2 VCC - 0.2 V VCC = 3V, VCE2 0.2 V, or VCE1 VCC - 0.2 V, VCE2 VCC - 0.2 V Ta 70C Ta 85C 0 tRC* Ratings min 2.0 typ max 5.5 0.8 A 2.5 ns ns Unit A
Data retention supply voltage
Data retention supply current Chip enable setup time Chip enable hold time Note *: tRC is the read cycle time.
ICCDR tCDR tR
Data Retention Waveforms (1): CE1 Control
Data retention mode
Data Retention Waveforms (2): CE2 Control
Data retention mode
Note *:In 5-V operation: 4.5 V In 3-V operation: 2.7 V
Notes on Circuit Design When actually design a circuit using these devices, take the following points into consideration and design the circuit so that none of the maximum rating items are ever exceeded. * Variations in the supply voltage * Variations in the electrical characteristics of components such as semiconductor devices, resistors, and capacitors. * Ambient temperature * Variations in input and clock signals * Possible application of abnormal pulses Also, these devices must be operated within the ranges stipulated in the allowable operating ranges. If CMOS IC input pins are left open, intermediate potential input voltages may occur leading to incorrect operation due to through currents or other phenomenon. Applications must handle unused input pins appropriately.
s No products described or contained herein are intended for use in surgical implants, life-support systems, aerospace equipment, nuclear power control systems, vehicles, disaster/crime-prevention equipment and the like, the failure of which may directly or indirectly cause injury, death or property loss. s Anyone purchasing any products described or contained herein for an above-mentioned use shall: Accept full responsibility and indemnify and defend SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors and all their officers and employees, jointly and severally, against any and all claims and litigation and all damages, cost and expenses associated with such use: Not impose any responsibility for any fault or negligence which may be cited in any such claim or litigation on SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors or any of their officers and employees jointly or severally. s Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of May, 1998. Specifications and information herein are subject to change without notice. PS No. 5804-9/9


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